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Glossario IA

Il dizionario completo dell'Intelligenza Artificiale

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TrueNorth

Neuromorphic processor developed by IBM, consisting of 1 million neurons and 256 million synapses organized in 4096 neurosynaptic cores. It operates with an extremely low power consumption of 70 milliwatts and uses an event-based architecture for massive parallel processing.

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Loihi

Intel's neuromorphic chip integrating 130,000 neurons and 130 million synapses with on-chip learning capabilities through spike-timing-dependent plasticity. It uses an asynchronous event-based computing model and supports various supervised and unsupervised learning schemes.

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Neurosynaptic Core

Fundamental computing unit in neuromorphic processors like TrueNorth, integrating neurons, synapses, and axons in a local architecture. Each core operates autonomously and can handle up to 256 neurons and 65,536 synapses in the case of IBM's architecture.

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Analog Neuromorphic Computing

Neuromorphic computing approach using continuous signals and analog circuits to simulate the behavior of biological neurons and synapses. This method offers superior integration density and energy efficiency but presents challenges in terms of precision and manufacturing variability.

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Digital Neuromorphic Computing

Neuromorphic implementation using digital circuits to simulate the behavior of spiking neural networks, offering better precision and reproducibility than the analog approach. Processors like TrueNorth and Loihi adopt this approach to ensure optimal reliability and scalability.

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Neurogrid

Neuromorphic platform developed at Stanford University using subthreshold analog circuits to simulate one million cortical neurons with a power consumption of only 3 watts. It is distinguished by its ability to model complex neuronal dynamics with high biological fidelity.

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BrainScaleS

European neuromorphic system using an accelerated analog approach operating 1000 times faster than real biological time, enabling rapid simulations of complex neural networks. It combines wafer-scale analog circuits with flexible digital infrastructure for control and configuration.

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SpiNNaker

Large-scale neuromorphic architecture based on multi-core ARM processors designed to simulate up to one billion spiking neurons in real-time. It uses a meshed network for communication between cores and is particularly optimized for large-scale simulations of cortical networks.

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MorphIC

Hybrid neuromorphic chip combining digital circuits for control with analog circuits for neural computation, offering a compromise between precision and energy efficiency. It implements reconfigurable neurons and synapses supporting various synaptic plasticity models.

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Dynap-SEL

Family of low-power event-based neuromorphic processors developed by SynSense, implementing analog neurons and synapses with on-chip learning capabilities. These chips are particularly optimized for edge computing applications requiring real-time processing with minimal power consumption.

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Intel Nahuku

Intel's neuromorphic development platform based on the Loihi chip, providing a complete environment for experimentation and prototyping of spiking neural network applications. It integrates multiple Loihi chips with software interfaces allowing flexible configuration of neural networks.

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Neuro-inspired Computing

Computational approach that draws inspiration from the principles of biological neural processing without seeking exact reproduction, focusing instead on the efficiency of algorithms and architectures. This discipline encompasses both strict neuromorphic systems and hybrid approaches adapted for practical applications.

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