KI-Glossar
Das vollständige Wörterbuch der Künstlichen Intelligenz
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HDL (Hardware Description Language)
Specialized programming language such as VHDL or Verilog, used to describe the behavior and structure of digital electronic circuits before their synthesis on FPGA.
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Logic synthesis
Automatic conversion process of a high-level HDL description into an optimized netlist of logic gates for the target FPGA architecture.
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Place and Route (P&R)
Final phase of FPGA implementation where logic blocks are physically positioned on the chip and interconnected via available routing channels.
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DSP Slice
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BRAM (Block RAM)
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HLS (High-Level Synthesis)
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Hardware pipeline
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Quantization on FPGA
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OpenCL for FPGA
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Partial Reconfiguration
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FPGA System on Chip (SoC) Architecture
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Bitstream
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Reconfiguration Latency
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Systolic Matrix Accelerator
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Vitis AI Design Flow
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Clock Domain Crossing (CDC)
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Resource Utilization
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Fixed-Point Computing Architecture
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Synthesis Pragmas
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